ams AS5852B Digital X-ray Flat Panel Readout IC

The AS5850B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.Four different power modes allow the user to minimize the current consumption for the chosen speed. Line times of 20, 28.5, 40 and 80 μs require as little as 3.1, 2.6, 1.6 and 1.1 mW per channel respectively. A special ADC operation mode is also available, that decreases the minimum line time to 15 μs without increasing the power consumption. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 10 μs.

The AS5851B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.Two different power modes allow the user to minimize the current consumption for the chosen speed. Line times of 40 and 80 μs require as little as 1.6 and 1.1 mW per channel respectively. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 20 μs.