ams 4LS_EVM_CB_FPGA Evaluation kit

4LS Evaluation Kit enables an easy setup and evaluation of the 4LS line scan family, namely the 4LS15K, 4LS10K and 4LS5K variants. The system’s FPGA provides the control signals to the sensor, defining the state machine timings. The user can choose one sensor clock out of two possibilities: 60 MHz (for 12-bit mode) and 80 MHz (for 8-bit mode). The FPGA acquires the RAW data synchronously via LVDS data stream and send to the host over USB3 protocol. Also over USB3, the user can configure the line rate and exposure time, as well as access to all sensor registers, performing write and read operations over SPI interface. Using the 4LS Viewer software, the user can evaluate the sensor’s features as well as data capture and analysis.